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Why was the SB750 necessary for higher clocks ?

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Kuroimaho

Member
Joined
May 26, 2004
Location
Japan, Tokyo, Ueno.
I was wondering why did AMD had to resort to a new SB and leave tuning to the end users instead of improving performance on the whole K10 lineup.

Here is what Anandtech gathered about the Aadvance Clock Calibration.

Anandtech said:
The most drastic and perhaps most important change on the SB750 is the new Advanced Clock Calibration interface that promises additional overclocking headroom or lower voltages with the Phenom processor series, especially the BE products. We have seen clock improvements ranging from 100MHz to over 500MHz depending on the processor we utilized.

The SB750 now has a direct 6-pin interface to the AM2+ socket on the motherboard, there are now pins on the Phenom CPU that connect directly to the SB750. These pins were previously unused and are now used as a means of communication between the South Bridge and the CPU. The SB750, in combination with an updated BIOS, can now override some of the CPU's internal settings which can potentially increase the overclocking headroom of the chip.

AMD says that the settings tweak doesn't impact performance and doesn't change thermals or voltages, it simply can allow a Phenom processor to clock higher when overclocking. The BIOS exposes the parameter being changed, which AMD refers to as the Advanced Clock Calibration (ACC) value. Typically this value has a range of -2 to 0, on motherboards with the SB750 that support ACC the value can be set from -12 to +12. Higher numbers should allow for higher clock speeds, while lower values should allow for lower voltages/lower power operation.

So it allows us to tweak the processors for lower voltage or for higher clocks.

AMD has a low power K8 and K10 products as well as high end Black Editions, wouldn't it make sense to calibrate the processors in the factory for low power and others for higher clockspeed ?

Why did they have to use a new SB instead of tuning the processors in the factory and getting higher clocks at the same voltage ?

From the idea till this product reached the shelves had to take at least half a year for AMD and likely even more. That means they were planning it before the B3 stepping came out.

Even if it was too late for the latest stepping they make minor modifications weekly during manufacturing slightly improving processors in Dresden and calibrating these processors differently sounds even simpler especially if it could be done during binning.

This 100-500 Mhz could make a lot of difference for the Phenom why don't they use it ?
 
It really depends on what exactly the technology is actually doing. If it is largely timing based like we speculated on before ACC was "explained" by AMD, then there wouldn't be much they could do in either the SB or CPU individually--they'd need a way to reference each other. If it is largely this "OMG CPU MICROCODE REWRITE!" like AMD shouts about, then it might just be a case of "Which is easier to modify?" They already had the SB in the design pipeline and it might potentially have required an expensive change to do it in the processor itself. But, if it were just a microcode change applied at each boot, I would expect that to come in the form of a BIOS patch. Other than microcode, not much about the core's physical or logical operation would be programmable I'd think. I don't know how ACC would magically do so. I guess another possibility is that there was an unused portion of the K10 that this now activates. It might have been a simple matter of "Yeah, the DID change the CPU," but just didn't have the platform to utilize the new features on until now with the SB750. That would make sense.

Of course, this is all just speculation on my part.
 
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