The REAL difference between D1 and M0 P4's

[NookieN]

I'm sure you recall all the articles (and ALL by experts) on the introduction of the i865 chipset that NO PAT was available.
Intel was CERTAIN that was the case.

No doubt the situation with PAT annoyed Intel. But CPUs and chipsets are very different beasts at this point. PAT was probably one of the first chipset-specific features that Intel was disabling in some chips. While the disabling did work, they didn't disable it for the lower NB-strap speeds, which gave motherboard makers a workaround.

CPUs, on the other hand, have had features that could be disabled for years. While there have been some misses -- Intel definitely learned from the glitch that allowed people to run 400Mhz dual Celerons -- it is extremely unlikely that such a miss would exist where the L3 cache is concerned.

Till then were BOTH just blowing smoke.

I'm not guessing at this. I'm telling you this is the way it is. I agree that it's not totally impossible that the L3 cache could be re-enabled, but it's no more likely to happen that unlocking the multiplier or HT.

 

[FIZZ3]

Hehe I thought maybe this picture is appropriate in this context.

All in good fun!

 

[arklab]

That has NO similarity at ALL!

It's an AMD saucer!