In general, heat is a form of energy (E). The rate of change of energy per unit time (t) is power (P). The unit of energy is Joule, the unit of time is second, and the unit of power is Watt.
P = E / t
Back to CPU, question is how P is generated and related to the CPU voltage and CPU frequency This post attempts to give the technical details. Warning, long post.
P = E / t
Back to CPU, question is how P is generated and related to the CPU voltage and CPU frequency This post attempts to give the technical details. Warning, long post.
Originally posted by hitechjb1
In the past, CPU frequency (MHz) roughly doubled for each generation of technology (180 nm, 130 nm). For 90, 65 nm and beyond, it would be harder and harder to achieve such trend due to the leakage current component which will surpass the active current component, ..., as possibly explained below.
How does leakage current slow down future generations of chips
In the past twenty years, chip manufacturers had a relatively easy time by doubling the CPU frequency every two to three years by shrinking the dimension (feature size) of transistors and wires inside a chip.
There are two main components of electric current inside a chip:
- active current: the "good" component that does logic computations by charging and discharging the internal capacitors of transistors and wires via the internal transistor switches
- leakage current: the "bad" component that is not computation related, and leaks through the transistors from supply voltage to ground, and dissipates as HEAT
E.g. a Tbred B 1700+ at rated 1.5 V, 1.47 GHz, draws about 30 A which is higher than the current of a typical house circuit breaker (which is typically 20-30A). When it is overclocked to 2.5 GHz, 1.9 V, it would draw about 65 A at full load which is more than 2-3 times the current of a house circuit breaker !!!
Historically, active current is the major current in a chip, so when more power is put in, the chip can run faster and does more computation.
From 90 nm, 65 nm and beyond, due to the smaller transistor channel length and thinner transistor oxide thickness, the leakage current increases at a faster rate and will surpass the active current. As a consequence, even when more power is put in, the chip frequency would increase at a slower pace than heat increase, the chip speed would level off due to heat. This is one of the major hurdle for silicon scaling to 90, 65 nm and beyond.
What is channel length
For details about channel length variation and overclocking:
Lower voltage, shorter transistor channel length, lower transistor threshold voltage and Tbred B 1700+/1800+DLT3C (page 15)
For details (about how to compute power, ...):Originally posted by hitechjb1
Relationship of clock frequency, die temperature, power and voltage (update)
As far as voltage Vcore, clock and die temperatue relationship, a chip (CPU) can be modeled as a capacitor C and a resistor R in parallel driven by Vcore. C models the useful active power to substain the computation by charging and discharging 100 millions of internal capacitors (from coupling between transistors, wires and silicon substrate). R models the wasted leakage power through the internal current paths through the dozens millions of transistors.
If the die temp is kept low enough, in theory, todays XP and P4 can be clocked as high as 3 GHz, 4 GHz. The power (the C component) going into the chip to run the clock at a frequency f and Vcore V is given by
P_active = C V^2 f
And this can go on to 3-4 GHz if the die is kept below certain temp. Most of the power are used to power the clock faster as Vcore is increased.
But in reality, for any cooling used, air, water, vapor, liquid nitrogen, ..., the die temperature will eventually increase as Vcore increases due to leakage current which heats up the chip. Though at a different rate depends on what cooling is used. The leakage current is small at low temp, and increases with temp increases and also at a faster rate as temp increases. The power that heats up the chip (the R component) is given by
P_leak = V^2 / R
From my experiment with the TB B 1700+ DLT3C, when die temp reaches around 40C, the chip leakage current begins to increase at a faster pace, and heats up the chip more, as well as due to the higher active power component P_active. Once this starts, any Vcore increase will heat up the chip at a faster pace. The exact Vcore when this occurs varies from chip to chip (100-200 mV difference), it depends on certain properties and characteristics ("gene") of how a particular CPU was born in silicon.
P = P_active + P_leak = CV^2 f + V^2 / R
After passing that temperature threshold, the portion P_leak going into heating the chip (the R component) will become larger and larger, as Vcore is increased. The additional power supplied to the CPU will be wasted as P_leak instead of going into the useful P_active. In other word, the useful P_active to power the chip faster (the C component) will increase at a diminishing rate. And the chip is just being heat up, and in turn slow down the chip, and cannot be clocked faster any more.
...
Relationship of clock, die temperature and Vcore (update)
- What is the active power of a CPU at frequency f and voltage V
- How to estimate CPU static and active power
- Effect of die temperature on CPU clock frequency at a given Vcore
(page 13)
More about leakage current and leakage power
In a silicon chip, the lowest part is silicon substrate on which 10-100 millions of transistors are deposited (current technology). Above the transistors are 100's millions wire segments in the form of multilayer grid. The metal wires are for getting power from outside, signals in and out the chip, and passing signal around the chip to the transistors.
The bulk of the silicon substrate is connected and typically grounded. Such silicon structure is usually called bulk silicon. This is what silicon chip in the past and down to 130 nm silicon chips are like. Currents are also leaked through the transistors to the substrate.
From 90 nm and down (some 130 nm are SOI), most of the silicon chips have the silicon body insulated from the substrate, hence the name silicon on insulator (SOI). So the leakage currents through transistors to the substrate are significantly reduced. This is the good part.
BUT the bad news is, ..., the main part of the leakage current in bulk silicon and SOI is due to the internal leakage current through the 10-100 millions transistors. Transistors have p- and n-type. Inside a chip, between the power supply (VDD) and ground, there are 10's millions of transitor paths, made up of some p- and some n-type, and leakage current are constantly flowing through those paths. This is called leakage current, or OFF current (since ideally the path should be off). So the leakage power can be written as V^2 / R, V is voltage (typically VDD), R respresents the equivalent resistance of all those leakage path. In older generation of silicon, these leakage paths and leakage current are relatively small and had not been an issue.
As transistors are getting smaller and smaller (90, 65, 45 nm), and transistor gate oxide thinner and thinner, these leakage currents are getting larger and larger (relative to the normal active current used for switching). And as described in the last post, the "wasteful" leakage current will be larger than the "useful" active current, unless something can be done. So the power for computation relative to leakage power is getting smaller for each generation, and frequency gain per generation will be leveling off.
What is active power
active power = C V^2 f?
C is the equivalent capacitance of a chip (CPU) for power modeling, V is the voltage (Vcore), f is the frequency.
Inside a chip, there are 10-100 millions of transistors, almost everyone functions as a logic switch. Logically, all these transistors switch according to the flow of instructions, logic commands and logic functions, .... Electrically, each of these transistors charges or discharges some capacitor(s) that are connected to them. At full load, a large % of these 10-100 millions transistors are charging and discharging capacitors. For those that are charging, useful active power given by Cload V^2 f is dissipated for performing logic computation. Cload is the capacitance loading to a transistor.
So the total active power C V^2 f is the sum total of those 10-100 million active power. And C is the equivalent capacitance for the chip, the equivalent sum total of the small Cload's. What it means is that, more active power is needed to run faster (higher f).
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