Intel plans optimizations for hyperthreading. — Ed
The Inquirer reports that Intel will have a new set of instructions to speed processing on its way.
It probably shouldn’t be calling SSE3, because unlike SSE and SSE2, these new instructions are supposed to enable and improve hyperthreading rather than floating-point operations.
Hyperthreading can help a lot in the right situation; it can also hurt. These instructions are meant to optimize the helping and minimize the hurting.
It will of course take forever for these new instructions to be adapted, but if you heavily use applications that are naturals for hyperthreading (database servers being one of them), this is something to keep a sharp eye on next year.
What a coincidence we’ll see this technology that helps servers along blossom just around the time Sledgehammer makes its debut. 🙂
More importantly, hyperthreading circuitry is already in place in current PIVs, so when applications with these new instructions come out, there will already be an established base of machines that can use them.
What does this mean? This particular item probably doesn’t mean much to the average user, but to me, it sure seems like Intel is a little scared of Hammer. Maybe it’s just a matter of having extra space due to a die shrink, but they seem to be adding many more improvements to Prescott than they did to Northwood.